1. Field of the Invention
This invention relates to multiplying current mirrors, and more particularly to multiplying current mirrors with base current compensation.
2. Description of the Related Art
A multiplying current mirror produces an output current that is a multiple of an input reference current. The base currents required by transistors in the mirror circuit introduce an error, and to date a multiplying current mirror with full base current compensation has not been available.
A simple current mirror is illustrated in FIG. 1. An input reference current Iin flows in an input branch which includes a diode-connected bipolar transistor Qin, with its collector connected to its emitter by a diode connector line 2. Although npn transistors are illustrated, pnp transistors could also be used, with an appropriate adjustment of circuit connections. Another bipolar transistor Qout constitutes an output branch, with its base connected in common with the base of Qin. The mirror produces an output current Io into the collector of Qout which is equal in magnitude to Iin, but with an error of 2δ, where δ is the transistor base current equal to the collector current divided by the transistor current gain β. The emitters of the two transistors are connected in common to a voltage reference, typically ground.
The reason for the 2δ error in Io is illustrated in the figure. Iin flows into an input node 4 in the input branch, with a current of 2δ diverted to diode connector line 2 to supply the base currents of Qin and Qout. The result is a current of I−2δ which flows into the collector of Qin, and it is this current that is mirrored into the collector of Qout.
A mirror circuit which compensates for the 2δ error, commonly called a Wilson current mirror, is illustrated in FIG. 2. In this circuit, the input branch consists of a bipolar transistor Q1, while the output branch consists of a diode-connected transistor Q2 whose base is connected in common with the base of Q1, and another bipolar transistor Q3 that receives Io at its collector, has its emitter connected in series with the collector of Q2, and its base connected to an input node 6 in the input branch which receives Iin and is also connected to the collector of Q1.
Q3 diverts a base current δ away from Iin, leaving a current equal to Iin-δ for the collector of Q1. This current is mirrored via the common base connection of Q1 and Q2 to the collector of Q2, with the Q2 diode connector line 8 carrying a current of 2δ to supply the base currents for Q1 and Q2. Since the emitter current of Q3 is divided between the. Iin−δ collector current of Q2 and the 2δ current in diode connector line 8, the Q3 emitter current sums to Iin+δ. Subtracting out the δ base current component of the Q3 emitter current leaves an output current Io in the collector of Q3 equal to Iin, thus removing the base current error.
The collector voltage of Q1 is one base-emitter voltage drop (typically about 0.6 volts) higher than the collector voltage of Q2, due to the base-emitter junction of Q3 which separates these two points. This is a minor source of error. To compensate for it, a diode-connected bipolar transistor Q4, shown in FIG. 3, has been inserted in the collector line to Q1, with the base and collector of Q4 connected to input node 6, and the emitter of Q4 connected to the collector of Q1. With this circuit, the collectors of Q1 and Q2 are both one base-emitter voltage drop level below the voltage at input node 6, and are therefore equal to each other. The modified Wilson current mirror of FIG. 3 is accordingly more accurate than the simple Wilson current mirror of FIG. 2. However, it is limited to an output current equal in magnitude to the input current, and thus does not provide for the many situations in which a multiple of the input current is desired at the output.
FIG. 4 illustrates a modification of the FIG. 2 circuit to provide an output current equal to twice the input current. It has the same configuration as FIG. 2, except the single-emitter diode-connected transistor Q2 in FIG. 2 is replaced with a double-emitter transistor Q2′. This causes the current flowing into the collector of Q2′ to be twice the collector current of Q1. However, because double-emitter device Q2′ draws a base current of 2δ, a base current error equal to −2δ is reintroduced into the output current Io. The various current flows from which this error is derived are illustrated in FIG. 4.
A similar situation results when the Wilson current mirror of FIG. 2 is modified to produce an output mirrored current less than the input reference current, or in other words to provide a current mirror gain of less than unity. This is illustrated in FIG. 5, which has the same configuration as FIG. 2 except single-emitter transistor Q1 in the input branch of FIG. 2 is replaced by a double-emitter transistor Q1′ to achieve an output current equal to half the input current. Again, this results in a base current error at the output. The error is 3δ/2, the derivation of which can be obtained from the various current flows illustrated in the figure.
Another current mirror with base current compensation, illustrated in FIG. 6, was mentioned by A. S. Sedra at the Special Session on Current Mode Analog I. C. Design, IEEE Symposium on Circuits and Systems, Portland, Oreg., June 1989. This circuit has a single input reference current Iin, and two output branches producing respective output currents Io1 and Io2, both approximately equal to Iin. The input branch consists of three transistors Q5, Q6 and Q7 connected in series, with Q5 diode-connected and receiving the input current, and Q7 having its emitter connected to the voltage reference.
The first output branch consists of transistors Q8, Q9 and Q10 connected in series between Io1 and the voltage reference, while the second output branch consists of transistors Q11, Q12 and Q13 connected in series between Io2 and the voltage reference. The first transistors in each branch Q5, Q8 and Q11 have their bases connected in common, as do the second transistors Q6, Q9, and Q12 and the third transistors Q7, Q10 and Q13. Q5, Q9 and Q13 are diode-connected, while the other transistors are not.
The current flows established at various locations in the circuit are illustrated in the figure, resulting in output currents from each output branch equal approximately to Iin. However, the circuit is fairly device intensive, requiring a minimum of nine transistors.